The merit of the GOS method lies, first of all, in the use of large-area, cost-effective Si wafers, which makes this technology even more practical in Si technology.
developed a so-called graphene-on-silicon (GOS) technology, in which EG is formed on a 3C-SiC thin film heteroepitaxially grown on a Si wafer. The challenge of the EG method, however, is the cost of high-quality SiC bulk wafers and the use of the SiC wafer itself, which forms a barrier for graphene to be adapted into Si technology. This is because the method consists entirely of conventional thermal processes and is thus free from transfer of graphene onto substrates, unlike mechanical exfoliation and CVD methods, which sometimes causes the onset of wrinkles in graphene and residual impurities at the interface. Among these proposed methods, the EG method is considered preferable in that it not only allows growth of large-area graphene but also yields a well-defined graphene/substrate interface. Various methods of the graphene formation have been reported, including mechanical exfoliation of graphite, CVD on catalytic metals, and epitaxial graphene formation (EG) on hexagonal (4H- and 6H-) SiC bulk wafers. This is mainly due to its giant carrier mobility (200,000 cm 2/Vs), high thermal conductivity, and high mechanical strength, as well as to its adaptability in integrated planar technology. Graphene, a single layer of sp 2-bonded carbon atoms arranged in a honeycomb lattice, has attracted much attention as a promising material in electronics and photonics.
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